? semiconductor components industries, llc, 2001 october, 2001 rev. 7 1 publication order number: sn74ls85/d sn74ls85 4-bit magnitude comparator the sn74ls85 is a 4-bit magnitude camparator which compares two 4-bit words (a, b), each word having four parallel inputs (a 0 a 3 , b 0 b 3 ); a 3 , b 3 being the most significant inputs. operation is not restricted to binary codes, the device will work with any monotonic code. t hree outputs are provided: aa greater than bo (o a>b ), aa less than bo (o ab , i ab = l, i a=b = h. for serial (ripple) expansion, the o a>b , o ab , i ab , o a sn74ls85 http://onsemi.com 2 logic symbol connection diagram dip (top view) parallel inputs a = b expander inputs a < b, a > b, expander inputs a greater than b output b greater than a output a equal to b output a 0 - a 3 , b 0 - b 3 i a = b i a < b , i a > b o a > b o a < b o a = b 1.5 u.l. 1.5 u.l. 0.5 u.l. 10 u.l. 10 u.l. 10 u.l. 0.75 u.l. 0.75 u.l. 0.25 u.l. 5 u.l. 5 u.l. 5 u.l. notes: a) 1 ttl unit load (u.l.) = 40 a high/1.6 ma low. high low (note a) loading pin names v cc = pin 16 gnd = pin 8 10 12 13 15 9 11 14 1 4 2 3 5 7 6 a 0 a 1 a 2 a 3 b 0 b 1 b 2 b 3 i a>b i ab o ab o a>b o a=b o a h = high level l = low level x = immaterial sn74ls85 http://onsemi.com 3 logic diagram o a>b o ab a1 b1 a0 b0 (15) (1) (13) (14) (12) (11) (10) (9) (2) (3) (4) truth table comparing inputs cascading inputs outputs a 3 ,b 3 a 2 ,b 2 a 1 ,b 1 a 0 ,b 0 i a>b i ab o ab 3 x x x x x x h l l a 3 b 2 xxx xx h ll a 3 =b 3 a 2 b 1 xx xx h ll a 3 =b 3 a 2 =b 2 a 1 b 0 x xx h ll a 3 =b 3 a 2 =b 2 a 1 =b 1 a 0 note: the sn74ls85 can be used as a 5-bit comparator only when the outputs are used to drive the a 0 a 3 and b 0 b 3 inputs of another sn74ls85 as shown in figure 2 in posi- tions #1, 2, 3, and 4. sn74ls85 http://onsemi.com 4 figure 1. comparing two n-bit words l = low level h = high level a 0 a 1 a 2 a 3 b 0 b 1 b 2 b 3 a 0 a 1 a 2 a 3 b 0 b 1 b 2 b 3 a 0 a 1 a 2 a 3 b 0 b 1 b 2 b 3 l l h i a > b i a < b i a = b o a > b o a < b o a = b i a > b i a < b i a = b o a > b o a < b o a = b a > b a < b a = b sn74ls85 sn74ls85 a n3 a n2 a n1 a n b n3 b n2 b n1 b n applications figure 2 shows a high speed method of comparing two 24-bit words with only two levels of device delay. with the technique shown in figure 1, six levels of device delay result when comparing two 24-bit words. the parallel technique can be expanded to any number of bits, see table 1. table 1 word length number of pkgs. 14 bits 1 524 bits 26 25120 bits 831 msb = most significant bit lsb = least significant bit l = low level h = high level nc = no connection a 0 a 1 a 2 a 3 b 0 b 1 b 2 b 3 a 0 a 1 a 2 a 3 b 0 b 1 b 2 b 3 l l h i a > b i a < b i a = b o a > b o a < b o a = b #5 (lsb) inputs a 0 a 1 a 2 a 3 b 0 b 1 b 2 b 3 i a > b i a < b i a = b o a > b o a < b o a = b #1 l nc a 20 a 21 b 23 b 22 b 21 b 20 a 23 a 22 a 19 b 19 (msb) a 5 a 6 a 7 a 8 b 5 b 6 b 7 b 8 a 0 a 1 a 2 a 3 b 0 b 1 b 2 b 3 i a > b i a < b i a = b o a > b o a < b o a = b #4 nc l a 4 b 4 a 0 a 1 a 2 a 3 b 0 b 1 b 2 b 3 i a > b i a < b i a = b o a > b o a < b o a = b #3 nc l a 9 b 9 a 10 a 11 b 13 b 12 b 11 b 10 a 13 a 12 a 0 a 1 a 2 a 3 b 0 b 1 b 2 b 3 i a > b i a < b i a = b o a > b o a < b o a = b #2 nc l a 14 b 14 a 15 a 16 b 18 b 17 b 16 b 15 a 18 a 17 outputs a 0 a 1 a 2 a 3 b 0 b 1 b 2 b 3 i a > b i a < b i a = b o a > b o a < b o a = b #6 inputs figure 2. comparison of two 24-bit words
sn74ls85 http://onsemi.com 5 dc characteristics over operating temperature range (unless otherwise specified) limits symbol parameter min typ max unit test conditions v ih input high voltage 2.0 v guaranteed input high voltage for all inputs v il input low voltage 0.8 v guaranteed input low voltage for all inputs v ik input clamp diode voltage 0.65 1.5 v v cc = min, i in = 18 ma v oh output high voltage 2.7 3.5 v v cc = min, i oh = max, v in = v ih or v il per truth table v ol out p ut low voltage 0.25 0.4 v i ol = 4.0 ma v cc = v cc min, v in v il or v ih v ol output low voltage 0.35 0.5 v i ol = 8.0 ma v in = v il or v ih per truth table i ih input high current a < b, a > b other inputs 20 60 m a v cc = max, v in = 2.7 v i ih a < b, a > b other inputs 0.1 0.3 ma v cc = max, v in = 7.0 v i il input low current a < b, a > b other inputs 0.4 1.2 ma v cc = max, v in = 0.4 v i os output short circuit current (note 2) 20 100 ma v cc = max i cc power supply current 20 ma v cc = max 2. not more than one output should be shorted at a time, nor for more than 1 second. ac characteristics (t a = 25 c, v cc = 5.0 v) limits symbol parameter min typ max unit test conditions t plh t phl any a or b to a < b, a > b 24 20 36 30 ns t plh t phl any a or b to a = b 27 23 45 45 ns t plh t phl a < b or a = b to a > b 14 11 22 17 ns v cc = 5.0 v c l = 15 pf t plh t phl a = b to a = b 13 13 20 26 ns l t plh t phl a > b or a = b to a < b 14 11 22 17 ns ac waveforms figure 3. figure 4. v in v out 1.3 v t phl 1.3 v 1.3 v 1.3 v t plh v in v out 1.3 v t phl 1.3 v 1.3 v 1.3 v t plh
sn74ls85 http://onsemi.com 6 package dimensions n suffix plastic package case 64808 issue r notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. a b f c s h g d j l m 16 pl seating 18 9 16 k plane t m a m 0.25 (0.010) t dim min max min max millimeters inches a 0.740 0.770 18.80 19.55 b 0.250 0.270 6.35 6.85 c 0.145 0.175 3.69 4.44 d 0.015 0.021 0.39 0.53 f 0.040 0.70 1.02 1.77 g 0.100 bsc 2.54 bsc h 0.050 bsc 1.27 bsc j 0.008 0.015 0.21 0.38 k 0.110 0.130 2.80 3.30 l 0.295 0.305 7.50 7.74 m 0 10 0 10 s 0.020 0.040 0.51 1.01 d suffix plastic soic package case 751b05 issue j notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 18 16 9 seating plane f j m r x 45 g 8 pl p b a m 0.25 (0.010) b s t d k c 16 pl s b m 0.25 (0.010) a s t dim min max min max inches millimeters a 9.80 10.00 0.386 0.393 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.229 0.244 r 0.25 0.50 0.010 0.019
sn74ls85 http://onsemi.com 7 package dimensions h e a 1 dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 0.78 --- 0.031 a 1 h e q 1 l e 10 0 10 l e q 1 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). m l detail p view p c a b e m 0.13 (0.005) 0.10 (0.004) 1 16 9 8 d z e a b c d e e l m z m suffix soeiaj package case 96601 issue o
sn74ls85 http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. sn74ls85/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada
|
